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IBM POWER指令集架构

本页使用了标题或全文手工转换
维基百科,自由的百科全书
(重定向自Power Architecture

IBM POWER指令集架构是由IBM公司开发的一种精简指令集计算机(RISC)指令集架構(ISA)。该名称是“增强RISC性能优化”(Performance Optimization With Enhanced RISC)的首字母縮略字[1]

该示意图显示了不同的POWER,PowerPC和Power ISA的演变

参考资料

  1. ^ Bakoglu, H. B.; Grohoski, G. F.; Montoye, R. K. The IBM RISC System/6000 processor: Hardware overview. IBM Journal of Research and Development. January 1990, 34 (1): 12–22. doi:10.1147/rd.341.0012. 

延伸阅读

  • Weiss, Shlomo; Smith, James Edward. POWER and PowerPC. Morgan Kaufmann. 1994. ISBN 978-1558602793.  — Relevant parts: Chapter 1 (the POWER architecture), Chapter 2 (how the architecture should be implemented), Chapter 6 (the additions introduced by the POWER2 architecture), Appendixes A and C (describes all POWER instructions), Appendix F (describes the differences between the POWER and PowerPC architectures)
  • Dewar, Robert B.K.; Smosna, Matthew. Microprocessors: A Programmer's View需要免费注册. McGraw-Hill. 1990.  — Chapter 12 describes the POWER architecture (referred to as RIOS, its earlier name) and its origins