吞脉冲计数器

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吞脉冲计数器(pulse-swallowing counter)是全数位回授系统中的元件。吞脉冲系统是fractional-N分频器的一部分[1],可以去除非整倍数频率合成器中在N、N+1或是N-1之间切换时出现的多余脉冲[2]

参考资料

  1. ^ Integrated Frequency Synthesizers for Wireless Systems, Andrea Lacaita, Salvatore Levantino, and Carlo Samori, [ambridge University Press, 2007, p. 24
  2. ^ Manassewitsch, Vadim. 1987. Frequency Synthesizers: Theory and Design, 3rd Ed., John Wiley & Sons, ISBN 0-471-01116-9, pp. 43–48

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